The following publications are possibly variants of this publication:
- Gate elimination: Circuit size lower bounds and #SAT upper boundsAlexander Golovnev, Alexander S. Kulikov, Alexander V. Smal, Suguru Tamaki. TCS, 719:46-63, 2018. [doi]
- Circuit size lower bounds and #SAT upper bounds through a general frameworkAlexander Golovnev, Alexander S. Kulikov, Alexander Smal, Suguru Tamaki. eccc, 23:22, 2016. [doi]
- Circuit Size Lower Bounds and #SAT Upper Bounds Through a General FrameworkAlexander Golovnev, Alexander S. Kulikov, Alexander V. Smal, Suguru Tamaki. mfcs 2016: [doi]