Design of a Two-Step Low-Power and High-Speed CMOS Flash ADC Architecture

Sumit Kumar, Nagesh Ch. Design of a Two-Step Low-Power and High-Speed CMOS Flash ADC Architecture. In 2020 24th International Symposium on VLSI Design and Test (VDAT), Bhubaneswar, India, July 23-25, 2020. pages 1-6, IEEE, 2020. [doi]

Abstract

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