Scaling probabilistic timing verification of hardware using abstractions in design source code

Jayanand Asok Kumar, Lingyi Liu, Shobha Vasudevan. Scaling probabilistic timing verification of hardware using abstractions in design source code. In Per Bjesse, Anna Slobodová, editors, International Conference on Formal Methods in Computer-Aided Design, FMCAD '11, Austin, TX, USA, October 30 - November 02, 2011. pages 196-205, FMCAD Inc., 2011. [doi]

@inproceedings{KumarLV11,
  title = {Scaling probabilistic timing verification of hardware using abstractions in design source code},
  author = {Jayanand Asok Kumar and Lingyi Liu and Shobha Vasudevan},
  year = {2011},
  url = {http://dl.acm.org/citation.cfm?id=2157684},
  researchr = {https://researchr.org/publication/KumarLV11},
  cites = {0},
  citedby = {0},
  pages = {196-205},
  booktitle = {International Conference on Formal Methods in Computer-Aided Design, FMCAD '11, Austin, TX, USA, October 30 - November 02, 2011},
  editor = {Per Bjesse and Anna Slobodová},
  publisher = {FMCAD Inc.},
  isbn = {978-0-9835678-1-3},
}