Design of Low Power Multiplier with Energy Efficient Full Adder Using DPTAAL

A. Kishore Kumar, D. Somasundareswari, V. Duraisamy, T. Shunbaga Pradeepa. Design of Low Power Multiplier with Energy Efficient Full Adder Using DPTAAL. VLSI Design, 2013, 2013. [doi]

Abstract

Abstract is missing.