Low power test generation for path delay faults using stability functions

Mahilchi Milir Vaseekar Kumar, Spyros Tragoudas. Low power test generation for path delay faults using stability functions. In John Lach, Gang Qu, Yehea I. Ismail, editors, Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, Chicago, Illinois, USA, April 17-19, 2005. pages 8-12, ACM, 2005. [doi]

Abstract

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