A 0.6V Retention VMIN Ultra-Low Leakage High Density 6T SRAM in 40nm CMOS Technology Using Adaptive Source Bias - researchr publication

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Ashish Kumar, G. S. Visweswaran. A 0.6V Retention VMIN Ultra-Low Leakage High Density 6T SRAM in 40nm CMOS Technology Using Adaptive Source Bias. In 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, VLSID 2018, Pune, India, January 6-10, 2018. pages 261-265, IEEE Computer Society, 2018. [doi]

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