Martin Kumm, Peter Zipf. High speed low complexity FPGA-based FIR filters using pipelined adder graphs. In Russell Tessier, editor, 2011 International Conference on Field-Programmable Technology, FPT 2011, New Delhi, India, December 12-14, 2011. pages 1-4, IEEE, 2011. [doi]
@inproceedings{KummZ11,
title = {High speed low complexity FPGA-based FIR filters using pipelined adder graphs},
author = {Martin Kumm and Peter Zipf},
year = {2011},
doi = {10.1109/FPT.2011.6132698},
url = {http://dx.doi.org/10.1109/FPT.2011.6132698},
researchr = {https://researchr.org/publication/KummZ11},
cites = {0},
citedby = {0},
pages = {1-4},
booktitle = {2011 International Conference on Field-Programmable Technology, FPT 2011, New Delhi, India, December 12-14, 2011},
editor = {Russell Tessier},
publisher = {IEEE},
isbn = {978-1-4577-1741-3},
}