-1-box implementation for 128-bit AES on FPGA

Dur-e-Shahwar Kundi, Arshad Aziz, Majida Kazmi. -1-box implementation for 128-bit AES on FPGA. Security and Communication Networks, 8(9):1725-1731, 2015. [doi]

@article{KundiAK15,
  title = {-1-box implementation for 128-bit AES on FPGA},
  author = {Dur-e-Shahwar Kundi and Arshad Aziz and Majida Kazmi},
  year = {2015},
  doi = {10.1002/sec.1138},
  url = {http://dx.doi.org/10.1002/sec.1138},
  researchr = {https://researchr.org/publication/KundiAK15},
  cites = {0},
  citedby = {0},
  journal = {Security and Communication Networks},
  volume = {8},
  number = {9},
  pages = {1725-1731},
}