H. T. Kung, Bradley McDanel, Sai Qian Zhang, Xin Dong, Chih-Chiang Chen. Maestro: A Memory-on-Logic Architecture for Coordinated Parallel Use of Many Systolic Arrays. In 30th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2019, New York, NY, USA, July 15-17, 2019. pages 42-50, IEEE, 2019. [doi]
@inproceedings{KungMZDC19,
title = {Maestro: A Memory-on-Logic Architecture for Coordinated Parallel Use of Many Systolic Arrays},
author = {H. T. Kung and Bradley McDanel and Sai Qian Zhang and Xin Dong and Chih-Chiang Chen},
year = {2019},
doi = {10.1109/ASAP.2019.00-31},
url = {https://doi.org/10.1109/ASAP.2019.00-31},
researchr = {https://researchr.org/publication/KungMZDC19},
cites = {0},
citedby = {0},
pages = {42-50},
booktitle = {30th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2019, New York, NY, USA, July 15-17, 2019},
publisher = {IEEE},
isbn = {978-1-7281-1601-3},
}