A 1.5 V full-swing BiCMOS dynamic logic gate circuit suitable for VLSI using low-voltage BiCMOS technology

James B. Kuo, K. W. Su, J. H. Lou, S. S. Chen, C. S. Chiang. A 1.5 V full-swing BiCMOS dynamic logic gate circuit suitable for VLSI using low-voltage BiCMOS technology. J. Solid-State Circuits, 30(1):73-75, January 1995. [doi]

Authors

James B. Kuo

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K. W. Su

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J. H. Lou

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S. S. Chen

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C. S. Chiang

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