Exploring Area and Delay Tradeoffs in FPGAs With Architecture and Automated Transistor Design

Ian Kuon, Jonathan Rose. Exploring Area and Delay Tradeoffs in FPGAs With Architecture and Automated Transistor Design. IEEE Trans. VLSI Syst., 19(1):71-84, 2011. [doi]

@article{KuonR11,
  title = {Exploring Area and Delay Tradeoffs in FPGAs With Architecture and Automated Transistor Design},
  author = {Ian Kuon and Jonathan Rose},
  year = {2011},
  doi = {10.1109/TVLSI.2009.2031318},
  url = {http://dx.doi.org/10.1109/TVLSI.2009.2031318},
  tags = {architecture, design},
  researchr = {https://researchr.org/publication/KuonR11},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {19},
  number = {1},
  pages = {71-84},
}