Over one million TPCC with a 45nm 6-core Xeon® CPU

Ravi Kuppuswamy, Shankar R. Sawant, Srikanth Balasubramanian, Pradeep Kaushik, Narayanan Natarajan, Jeffrey D. Gilbert. Over one million TPCC with a 45nm 6-core Xeon® CPU. In IEEE International Solid-State Circuits Conference, ISSCC 2009, Digest of Technical Papers, San Francisco, CA, USA, 8-12 February, 2009. pages 70-71, IEEE, 2009. [doi]

@inproceedings{KuppuswamySBKNG09,
  title = {Over one million TPCC with a 45nm 6-core Xeon® CPU},
  author = {Ravi Kuppuswamy and Shankar R. Sawant and Srikanth Balasubramanian and Pradeep Kaushik and Narayanan Natarajan and Jeffrey D. Gilbert},
  year = {2009},
  doi = {10.1109/ISSCC.2009.4977312},
  url = {http://dx.doi.org/10.1109/ISSCC.2009.4977312},
  researchr = {https://researchr.org/publication/KuppuswamySBKNG09},
  cites = {0},
  citedby = {0},
  pages = {70-71},
  booktitle = {IEEE International Solid-State Circuits Conference, ISSCC 2009, Digest of Technical Papers, San Francisco, CA, USA, 8-12 February, 2009},
  publisher = {IEEE},
  isbn = {978-1-4244-3458-9},
}