Masanori Kurimoto, Takeshi Yamamoto, Satoshi Nakano, Atsuto Hanami, Hiroyuki Kondo. Verification work reduction methodology in low-power chip implementation. ACM Trans. Design Autom. Electr. Syst., 18(1):12, 2012. [doi]
@article{KurimotoYNHK12,
title = {Verification work reduction methodology in low-power chip implementation},
author = {Masanori Kurimoto and Takeshi Yamamoto and Satoshi Nakano and Atsuto Hanami and Hiroyuki Kondo},
year = {2012},
doi = {10.1145/2390191.2390203},
url = {http://doi.acm.org/10.1145/2390191.2390203},
researchr = {https://researchr.org/publication/KurimotoYNHK12},
cites = {0},
citedby = {0},
journal = {ACM Trans. Design Autom. Electr. Syst.},
volume = {18},
number = {1},
pages = {12},
}