Jisu Kwon, Sejong Oh, Daejin Park. Metamorphic Edge Processor Simulation Framework Using Flexible Runtime Partial Replacement of Software-Embedded Verilog RTL Models. In IEEE International Symposium on Circuits and Systems, ISCAS 2021, Daegu, South Korea, May 22-28, 2021. pages 1-5, IEEE, 2021. [doi]
@inproceedings{KwonOP21,
title = {Metamorphic Edge Processor Simulation Framework Using Flexible Runtime Partial Replacement of Software-Embedded Verilog RTL Models},
author = {Jisu Kwon and Sejong Oh and Daejin Park},
year = {2021},
doi = {10.1109/ISCAS51556.2021.9401354},
url = {https://doi.org/10.1109/ISCAS51556.2021.9401354},
researchr = {https://researchr.org/publication/KwonOP21},
cites = {0},
citedby = {0},
pages = {1-5},
booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2021, Daegu, South Korea, May 22-28, 2021},
publisher = {IEEE},
isbn = {978-1-7281-9201-7},
}