Lightweighted Shallow CTS Techniques for Checking Clock Tree Synthesizable Paths in RTL Design Time - researchr publication related

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Nayoung Kwon, Daejin Park. Lightweighted Shallow CTS Techniques for Checking Clock Tree Synthesizable Paths in RTL Design Time. In 19th International SoC Design Conference, ISOCC 2022, Gangneung-si, Republic of Korea, October 19-22, 2022. pages 394-395, IEEE, 2022. [doi]

The following publications are possibly variants of this publication:

Lightweighted Shallow CTS Techniques for Checking Clock Tree Synthesizable Paths and Optimizing Clock Tree in RTL Design TimeNayoung Kwon, Daejin Park. ictc 2023: 1572-1577 [doi]

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