23.4 An extremely low-standby-power 3.733Gb/s/pin 2Gb LPDDR4 SDRAM for wearable devices

Hye-Jung Kwon, Eunsung Seo, Changyong Lee, Young Hun Seo, Gong-Heum Han, Hye-Ran Kim, Jong-Ho Lee, Min-Su Jang, Sung-Geun Do, Seung Hyun Cho, Jae-Koo Park, Su-Yeon Doo, Jung-Bum Shin, Sang-Hoon Jung, Hyoung-Ju Kim, In-Ho Im, Beob-Rae Cho, Jae Woong Lee, Jae-Youl Lee, Ki-Hun Yu, Hyung Kyu Kim, Chul-Hee Jeon, Hyun Soo Park, Sang-Sun Kim, Seok Ho Lee, Jong-Wook Park, Seung-Sub Lee, Bo-Tak Lim, Jun-Young Park, Yoon-Sik Park, Hyuk-jun Kwon, Seung-Jun Bae, Jung Hwan Choi, Kwang-Il Park, Seong-Jin Jang, Gyo-Young Jin. 23.4 An extremely low-standby-power 3.733Gb/s/pin 2Gb LPDDR4 SDRAM for wearable devices. In 2017 IEEE International Solid-State Circuits Conference, ISSCC 2017, San Francisco, CA, USA, February 5-9, 2017. pages 394-395, IEEE, 2017. [doi]

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