Low Power In-Memory Implementation of Ternary Neural Networks with Resistive RAM-Based Synapse

Axel Laborieux, Marc Bocquet, Tifenn Hirtzlin, J.-O. Klein, L. Herrera Diez, E. Nowak, Elisa Vianello, Jean Michel Portal, Damien Querlioz. Low Power In-Memory Implementation of Ternary Neural Networks with Resistive RAM-Based Synapse. In 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2020, Genova, Italy, August 31 - September 2, 2020. pages 136-140, IEEE, 2020. [doi]

Abstract

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