Sakari Lahti, Jarno Vanne, Timo D. Hämäläinen. Designing a clock cycle accurate application with high-level synthesis. In IECON 2016 - 42nd Annual Conference of the IEEE Industrial Electronics Society, Florence, Italy, October 23-26, 2016. pages 4756-4761, IEEE, 2016. [doi]
@inproceedings{LahtiVH16,
title = {Designing a clock cycle accurate application with high-level synthesis},
author = {Sakari Lahti and Jarno Vanne and Timo D. Hämäläinen},
year = {2016},
doi = {10.1109/IECON.2016.7793783},
url = {https://doi.org/10.1109/IECON.2016.7793783},
researchr = {https://researchr.org/publication/LahtiVH16},
cites = {0},
citedby = {0},
pages = {4756-4761},
booktitle = {IECON 2016 - 42nd Annual Conference of the IEEE Industrial Electronics Society, Florence, Italy, October 23-26, 2016},
publisher = {IEEE},
isbn = {978-1-5090-3474-1},
}