Boppana Lakshmi, A. S. Dhar. VLSI architecture for low latency radix-4 CORDIC. Computers & Electrical Engineering, 37(6):1032-1042, 2011. [doi]
@article{LakshmiD11,
title = {VLSI architecture for low latency radix-4 CORDIC},
author = {Boppana Lakshmi and A. S. Dhar},
year = {2011},
doi = {10.1016/j.compeleceng.2011.07.011},
url = {http://dx.doi.org/10.1016/j.compeleceng.2011.07.011},
researchr = {https://researchr.org/publication/LakshmiD11},
cites = {0},
citedby = {0},
journal = {Computers & Electrical Engineering},
volume = {37},
number = {6},
pages = {1032-1042},
}