Partitioning and ordering of logic equations for optimum MOS LSI device layout

Robert P. Larsen, L. Margol. Partitioning and ordering of logic equations for optimum MOS LSI device layout. In Proceedings of the 8th Design Automation Workshop, DAC '71, Atlantic City, NJ, USA, June 28-30, 1971. pages 131-142, ACM, 1971. [doi]

Abstract

Abstract is missing.