12 bits, 40MS/s, low power pipelined SAR ADC

Vahid Khojasteh Lazarjan, Khosrow Hajsadeghi. 12 bits, 40MS/s, low power pipelined SAR ADC. In IEEE 57th International Midwest Symposium on Circuits and Systems, MWSCAS 2014, College Station, TX, USA, August 3-6, 2014. pages 841-844, IEEE, 2014. [doi]

Abstract

Abstract is missing.