Reviving erroneous stability-based clock-gating using partial Max-SAT

Bao Le, Dipanjan Sengupta, Andreas G. Veneris. Reviving erroneous stability-based clock-gating using partial Max-SAT. In 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013, Yokohama, Japan, January 22-25, 2013. pages 717-722, IEEE, 2013. [doi]

@inproceedings{LeSV13,
  title = {Reviving erroneous stability-based clock-gating using partial Max-SAT},
  author = {Bao Le and Dipanjan Sengupta and Andreas G. Veneris},
  year = {2013},
  doi = {10.1109/ASPDAC.2013.6509685},
  url = {http://dx.doi.org/10.1109/ASPDAC.2013.6509685},
  researchr = {https://researchr.org/publication/LeSV13},
  cites = {0},
  citedby = {0},
  pages = {717-722},
  booktitle = {18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013, Yokohama, Japan, January 22-25, 2013},
  publisher = {IEEE},
  isbn = {978-1-4673-3029-9},
}