A 6.4Gb/s/pin at sub-1V supply voltage TX-interleaving technique for mobile DRAM interface

Chang-Kyo Lee, Min-Su Ahn, Daesik Moon, Kiho Kim, Yoon-Joo Eom, Won Young Lee, Jongmin Kim, Sanghyuk Yoon, Baekkyu Choi, Seokhong Kwon, Joon Young Park, Seung-Jun Bae, Yong-Cheol Bae, Jung Hwan Choi, Seong-Jin Jang, Gyo-Young Jin. A 6.4Gb/s/pin at sub-1V supply voltage TX-interleaving technique for mobile DRAM interface. In Symposium on VLSI Circuits, VLSIC 2015, Kyoto, Japan, June 17-19, 2015. pages 182, IEEE, 2015. [doi]

@inproceedings{LeeAMKELKYCKPBB15,
  title = {A 6.4Gb/s/pin at sub-1V supply voltage TX-interleaving technique for mobile DRAM interface},
  author = {Chang-Kyo Lee and Min-Su Ahn and Daesik Moon and Kiho Kim and Yoon-Joo Eom and Won Young Lee and Jongmin Kim and Sanghyuk Yoon and Baekkyu Choi and Seokhong Kwon and Joon Young Park and Seung-Jun Bae and Yong-Cheol Bae and Jung Hwan Choi and Seong-Jin Jang and Gyo-Young Jin},
  year = {2015},
  doi = {10.1109/VLSIC.2015.7231254},
  url = {http://dx.doi.org/10.1109/VLSIC.2015.7231254},
  researchr = {https://researchr.org/publication/LeeAMKELKYCKPBB15},
  cites = {0},
  citedby = {0},
  pages = {182},
  booktitle = {Symposium on VLSI Circuits, VLSIC 2015, Kyoto, Japan, June 17-19, 2015},
  publisher = {IEEE},
  isbn = {978-4-86348-502-0},
}