A 6 bit, 7 mW, 700 MS/s Subranging ADC Using CDAC and Gate-Weighted Interpolation - researchr publication authors

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Hyunui Lee, Yusuke Asada, Masaya Miyahara, Akira Matsuzawa. A 6 bit, 7 mW, 700 MS/s Subranging ADC Using CDAC and Gate-Weighted Interpolation. IEICE Transactions, 96-A(2):422-433, 2013. [doi]

This author has not been identified. Look up 'Hyunui Lee' in GoogleThis author has not been identified. Look up 'Yusuke Asada' in GoogleThis author has not been identified. Look up 'Masaya Miyahara' in GoogleThis author has not been identified. Look up 'Akira Matsuzawa' in Google

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