Performance Analysis of Bit-Width Reduced Floating-Point Arithmetic Units in FPGAs: A Case Study of Neural Network-Based Face Detector - researchr publication

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Yongsoon Lee, Younhee Choi, Moon Ho Lee, Seok-Bum Ko. Performance Analysis of Bit-Width Reduced Floating-Point Arithmetic Units in FPGAs: A Case Study of Neural Network-Based Face Detector. EURASIP J. Emb. Sys., 2009, 2009. [doi]

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