Design of 56 Gb/s NRZ and PAM4 SerDes Transceivers in CMOS Technologies

Jri Lee, Ping-Chuan Chiang, Pen-Jui Peng, Li-Yang Chen, Chih-Chi Weng. Design of 56 Gb/s NRZ and PAM4 SerDes Transceivers in CMOS Technologies. J. Solid-State Circuits, 50(9):2061-2073, 2015. [doi]

@article{LeeCPCW15,
  title = {Design of 56 Gb/s NRZ and PAM4 SerDes Transceivers in CMOS Technologies},
  author = {Jri Lee and Ping-Chuan Chiang and Pen-Jui Peng and Li-Yang Chen and Chih-Chi Weng},
  year = {2015},
  doi = {10.1109/JSSC.2015.2433269},
  url = {http://dx.doi.org/10.1109/JSSC.2015.2433269},
  researchr = {https://researchr.org/publication/LeeCPCW15},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {50},
  number = {9},
  pages = {2061-2073},
}