Jaeyong Lee, Sungil Cho, Kwangsub Yoon. 12bits 40mhz pipelined ADC with duty-correction circuit. In Vijay Narayanan, Zhiyuan Yan, Enrico Macii, Sanjukta Bhanja, editors, Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, Orlando, Florida, USA, May 4-6, 2008. pages 441-444, ACM, 2008. [doi]
@inproceedings{LeeCY08:0,
title = {12bits 40mhz pipelined ADC with duty-correction circuit},
author = {Jaeyong Lee and Sungil Cho and Kwangsub Yoon},
year = {2008},
doi = {10.1145/1366110.1366215},
url = {http://doi.acm.org/10.1145/1366110.1366215},
researchr = {https://researchr.org/publication/LeeCY08%3A0},
cites = {0},
citedby = {0},
pages = {441-444},
booktitle = {Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, Orlando, Florida, USA, May 4-6, 2008},
editor = {Vijay Narayanan and Zhiyuan Yan and Enrico Macii and Sanjukta Bhanja},
publisher = {ACM},
isbn = {978-1-59593-999-9},
}