An on-chip cache compression technique to reduce decompression overhead and design complexity

Jang-Soo Lee, Won-Kee Hong, Shin-Dug Kim. An on-chip cache compression technique to reduce decompression overhead and design complexity. Journal of Systems Architecture, 46(15):1365-1382, 2000. [doi]

Authors

Jang-Soo Lee

This author has not been identified. Look up 'Jang-Soo Lee' in Google

Won-Kee Hong

This author has not been identified. Look up 'Won-Kee Hong' in Google

Shin-Dug Kim

This author has not been identified. Look up 'Shin-Dug Kim' in Google