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An On-Chip Monitoring Circuit with 51-Phase PLL-Based Frequency Synthesizer for 8-Gb/s ODR Single-Ended Signaling Integrity Analysis

Pil-Ho Lee, Yu-Jeong Hwang, Han-Yeol Lee, Hyun Bae Lee, Young-Chan Jang. An On-Chip Monitoring Circuit with 51-Phase PLL-Based Frequency Synthesizer for 8-Gb/s ODR Single-Ended Signaling Integrity Analysis. IEICE Transactions, 99-C(4):440-443, 2016. [doi]

Authors

Pil-Ho Lee

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Yu-Jeong Hwang

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Han-Yeol Lee

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Hyun Bae Lee

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Young-Chan Jang

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