Pil-Ho Lee, Yu-Jeong Hwang, Han-Yeol Lee, Hyun Bae Lee, Young-Chan Jang. An On-Chip Monitoring Circuit with 51-Phase PLL-Based Frequency Synthesizer for 8-Gb/s ODR Single-Ended Signaling Integrity Analysis. IEICE Transactions, 99-C(4):440-443, 2016. [doi]
@article{LeeHLLJ16,
title = {An On-Chip Monitoring Circuit with 51-Phase PLL-Based Frequency Synthesizer for 8-Gb/s ODR Single-Ended Signaling Integrity Analysis},
author = {Pil-Ho Lee and Yu-Jeong Hwang and Han-Yeol Lee and Hyun Bae Lee and Young-Chan Jang},
year = {2016},
url = {http://search.ieice.org/bin/summary.php?id=e99-c_4_440},
researchr = {https://researchr.org/publication/LeeHLLJ16},
cites = {0},
citedby = {0},
journal = {IEICE Transactions},
volume = {99-C},
number = {4},
pages = {440-443},
}