Terry Lee, Ibrahim N. Hajj, Elizabeth M. Rudnick, Janak H. Patel. Genetic-algorithm-based test generation for current testing of bridging faults in CMOS VLSI circuits. In 14th IEEE VLSI Test Symposium (VTS 96), April 28 - May 1, 1996, Princeton, NJ, USA. pages 456-462, IEEE Computer Society, 1996. [doi]
Abstract is missing.