Dongchan Lee, Youngmin Kim. A simplified, high-speed, Error-tolerant Adder using Zero Padding Method. In 18th International SoC Design Conference, ISOCC 2021, Jeju Island, South Korea, Republic of, October 6-9, 2021. pages 343-344, IEEE, 2021. [doi]
@inproceedings{LeeK21-27, title = {A simplified, high-speed, Error-tolerant Adder using Zero Padding Method}, author = {Dongchan Lee and Youngmin Kim}, year = {2021}, doi = {10.1109/ISOCC53507.2021.9613912}, url = {https://doi.org/10.1109/ISOCC53507.2021.9613912}, researchr = {https://researchr.org/publication/LeeK21-27}, cites = {0}, citedby = {0}, pages = {343-344}, booktitle = {18th International SoC Design Conference, ISOCC 2021, Jeju Island, South Korea, Republic of, October 6-9, 2021}, publisher = {IEEE}, isbn = {978-1-6654-0174-6}, }