Low Power Ternary XNOR using 10T SRAM for In-Memory Computing

Sanghyun Lee, Youngmin Kim. Low Power Ternary XNOR using 10T SRAM for In-Memory Computing. In 19th International SoC Design Conference, ISOCC 2022, Gangneung-si, Republic of Korea, October 19-22, 2022. pages 352-353, IEEE, 2022. [doi]

@inproceedings{LeeK22a-4,
  title = {Low Power Ternary XNOR using 10T SRAM for In-Memory Computing},
  author = {Sanghyun Lee and Youngmin Kim},
  year = {2022},
  doi = {10.1109/ISOCC56007.2022.10031490},
  url = {https://doi.org/10.1109/ISOCC56007.2022.10031490},
  researchr = {https://researchr.org/publication/LeeK22a-4},
  cites = {0},
  citedby = {0},
  pages = {352-353},
  booktitle = {19th International SoC Design Conference, ISOCC 2022, Gangneung-si, Republic of Korea, October 19-22, 2022},
  publisher = {IEEE},
  isbn = {978-1-6654-5971-6},
}