Minseob Lee, Shinwoong Kim, Hwasuk Cho, Jahyun Koo, Kwang-Hee Choi, Jin Hyeok Choi, Byungsub Kim, Hong June Park, Jae-Yoon Sim. A 0.3-to-1.2V frequency-scalable fractional-N ADPLL with a speculative dual-referenced interpolating TDC. In 2018 IEEE International Solid-State Circuits Conference, ISSCC 2018, San Francisco, CA, USA, February 11-15, 2018. pages 122-124, IEEE, 2018. [doi]
@inproceedings{LeeKCKCCKPS18,
title = {A 0.3-to-1.2V frequency-scalable fractional-N ADPLL with a speculative dual-referenced interpolating TDC},
author = {Minseob Lee and Shinwoong Kim and Hwasuk Cho and Jahyun Koo and Kwang-Hee Choi and Jin Hyeok Choi and Byungsub Kim and Hong June Park and Jae-Yoon Sim},
year = {2018},
doi = {10.1109/ISSCC.2018.8310214},
url = {https://doi.org/10.1109/ISSCC.2018.8310214},
researchr = {https://researchr.org/publication/LeeKCKCCKPS18},
cites = {0},
citedby = {0},
pages = {122-124},
booktitle = {2018 IEEE International Solid-State Circuits Conference, ISSCC 2018, San Francisco, CA, USA, February 11-15, 2018},
publisher = {IEEE},
isbn = {978-1-5090-4940-0},
}