Runtime Thermal Management for 3-D Chip-Multiprocessors With Hybrid SRAM/MRAM L2 Cache

Seunghan Lee, Kyungsu Kang, Chong-Min Kyung. Runtime Thermal Management for 3-D Chip-Multiprocessors With Hybrid SRAM/MRAM L2 Cache. IEEE Trans. VLSI Syst., 23(3):520-533, 2015. [doi]

@article{LeeKK15,
  title = {Runtime Thermal Management for 3-D Chip-Multiprocessors With Hybrid SRAM/MRAM L2 Cache},
  author = {Seunghan Lee and Kyungsu Kang and Chong-Min Kyung},
  year = {2015},
  doi = {10.1109/TVLSI.2014.2311798},
  url = {http://dx.doi.org/10.1109/TVLSI.2014.2311798},
  researchr = {https://researchr.org/publication/LeeKK15},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {23},
  number = {3},
  pages = {520-533},
}