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Si-Based Dual-Gate Field-Effect Transistor Array for Low-Power On-Chip Trainable Hardware Neural Networks

Kyu-Ho Lee, Dongseok Kwon, In-Seok Lee, Joon Hwang, Jiseong Im, Jong-Ho Bae, Woo-Young Choi, Sung Yun Woo, Jong-Ho Lee 0002. Si-Based Dual-Gate Field-Effect Transistor Array for Low-Power On-Chip Trainable Hardware Neural Networks. Adv. Intell. Syst., 6(1), January 2024. [doi]

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