Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms

Donghyuk Lee, Samira Manabi Khan, Lavanya Subramanian, Saugata Ghose, Rachata Ausavarungnirun, Gennady Pekhimenko, Vivek Seshadri, Onur Mutlu. Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms. In Bruce E. Hajek, Sewoong Oh, Augustin Chaintreau, Leana Golubchik, Zhi-Li Zhang, editors, Proceedings of the 2017 ACM SIGMETRICS / International Conference on Measurement and Modeling of Computer Systems, Urbana-Champaign, IL, USA, June 05 - 09, 2017. pages 54, ACM, 2017. [doi]

@inproceedings{LeeKSGAPSM17-0,
  title = {Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms},
  author = {Donghyuk Lee and Samira Manabi Khan and Lavanya Subramanian and Saugata Ghose and Rachata Ausavarungnirun and Gennady Pekhimenko and Vivek Seshadri and Onur Mutlu},
  year = {2017},
  doi = {10.1145/3078505.3078533},
  url = {http://doi.acm.org/10.1145/3078505.3078533},
  researchr = {https://researchr.org/publication/LeeKSGAPSM17-0},
  cites = {0},
  citedby = {0},
  pages = {54},
  booktitle = {Proceedings of the 2017 ACM SIGMETRICS / International Conference on Measurement and Modeling of Computer Systems, Urbana-Champaign, IL, USA, June 05 - 09, 2017},
  editor = {Bruce E. Hajek and Sewoong Oh and Augustin Chaintreau and Leana Golubchik and Zhi-Li Zhang},
  publisher = {ACM},
  isbn = {978-1-4503-5032-7},
}