Daewoong Lee, Dongil Lee, Yong Hun Kim, Lee-Sup Kim. A 0.87 V 12.5 Gb/s Clock-Path Feedback Equalization Receiver with Unfixed Tap Weighting Property in 65 nm CMOS. In 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019. pages 196, IEEE, 2019. [doi]
@inproceedings{LeeLKK19-0,
title = {A 0.87 V 12.5 Gb/s Clock-Path Feedback Equalization Receiver with Unfixed Tap Weighting Property in 65 nm CMOS},
author = {Daewoong Lee and Dongil Lee and Yong Hun Kim and Lee-Sup Kim},
year = {2019},
doi = {10.23919/VLSIC.2019.8777968},
url = {https://doi.org/10.23919/VLSIC.2019.8777968},
researchr = {https://researchr.org/publication/LeeLKK19-0},
cites = {0},
citedby = {0},
pages = {196},
booktitle = {2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019},
publisher = {IEEE},
isbn = {978-4-86348-720-8},
}