The following publications are possibly variants of this publication:
- A 22 to 26.5 Gb/s Optical Receiver With All-Digital Clock and Data Recovery in a 65 nm CMOS ProcessSang-Hyeok Chu, Woo-Rham Bae, Gyu-Seob Jeong, Sungchun Jang, SungWoo Kim, Jiho Joo, Gyungock Kim, Deog Kyoon Jeong. jssc, 50(11):2603-2612, 2015. [doi]
- A 25-to-28 Gb/s High-Sensitivity ( $-$9.7 dBm) 65 nm CMOS Optical Receiver for Board-to-Board InterconnectsTakashi Takemoto, Hiroki Yamashita, Toru Yazaki, Norio Chujo, Yong Lee, Yasunobu Matsuoka. jssc, 49(10):2259-2276, 2014. [doi]