2 Bit-Cell, Dual-Port Access, and 51.2Gb/s Read Throughput for Automotive and Edge AI Applications

Po-Hao Lee, Chia-Fu Lee, Hon-Jarn Lin, Cheng-Han Lu, Yen-An Chang, Pranata W. Sanjaya, Chia-Jung Tsen, Kuan-Chun Chen, Ming-Chieh Lin, Chao-Jung Hung, Tan-Li Chou, Chih-Hui Weng, Chia-Yu Wang, J.-J. Wu, Harry Chuang, Yih Wang, Yu-Der Chih, Tsung-Yung Jonathan Chang. 2 Bit-Cell, Dual-Port Access, and 51.2Gb/s Read Throughput for Automotive and Edge AI Applications. In IEEE International Solid-State Circuits Conference, ISSCC 2026, San Francisco, CA, USA, February 15-19, 2026. pages 260-262, IEEE, 2026. [doi]

Authors

Po-Hao Lee

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Chia-Fu Lee

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Hon-Jarn Lin

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Cheng-Han Lu

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Yen-An Chang

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Pranata W. Sanjaya

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Chia-Jung Tsen

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Kuan-Chun Chen

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Ming-Chieh Lin

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Chao-Jung Hung

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Tan-Li Chou

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Chih-Hui Weng

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Chia-Yu Wang

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J.-J. Wu

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Harry Chuang

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Yih Wang

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Yu-Der Chih

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Tsung-Yung Jonathan Chang

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