A Flexible Tradeoff between Code Size and WCET Employing Dual Instruction Set Processors

Sheayun Lee, Jaejin Lee, Chang Yun Park, Sang Lyul Min. A Flexible Tradeoff between Code Size and WCET Employing Dual Instruction Set Processors. In Jan Gustafsson, editor, Proceedings of the 3rd International Workshop on Worst-Case Execution Time Analysis, WCET 2003 - a Satellite Event to ECRTS 2003, Polytechnic Institute of Porto, Portugal, July 1, 2003. Volume MDH-MRTC-116/2003-1-SE of pages 91-94, Department of Computer Science and Engineering, Mälardalen University, Box 883, 721 23 Västerås, Sweden, 2003.

Abstract

Abstract is missing.