5.10 A 4.7MHz 53μW fully differential CMOS reference clock oscillator with -22dB worst-case PSNR for miniaturized SoCs

Junghyup Lee, Pyoungwon Park, SeongHwan Cho, Minkyu Je. 5.10 A 4.7MHz 53μW fully differential CMOS reference clock oscillator with -22dB worst-case PSNR for miniaturized SoCs. In 2015 IEEE International Solid-State Circuits Conference, ISSCC 2015, Digest of Technical Papers, San Francisco, CA, USA, February 22-26, 2015. pages 1-3, IEEE, 2015. [doi]

@inproceedings{LeePCJ15,
  title = {5.10 A 4.7MHz 53μW fully differential CMOS reference clock oscillator with -22dB worst-case PSNR for miniaturized SoCs},
  author = {Junghyup Lee and Pyoungwon Park and SeongHwan Cho and Minkyu Je},
  year = {2015},
  doi = {10.1109/ISSCC.2015.7062948},
  url = {http://dx.doi.org/10.1109/ISSCC.2015.7062948},
  researchr = {https://researchr.org/publication/LeePCJ15},
  cites = {0},
  citedby = {0},
  pages = {1-3},
  booktitle = {2015 IEEE International Solid-State Circuits Conference, ISSCC 2015, Digest of Technical Papers, San Francisco, CA, USA, February 22-26, 2015},
  publisher = {IEEE},
  isbn = {978-1-4799-6224-2},
}