Jongeun Lee, Aviral Shrivastava. A Compiler-Microarchitecture Hybrid Approach to Soft Error Reduction for Register Files. IEEE Trans. on CAD of Integrated Circuits and Systems, 29(7):1018-1027, 2010. [doi]
@article{LeeS10-26,
title = {A Compiler-Microarchitecture Hybrid Approach to Soft Error Reduction for Register Files},
author = {Jongeun Lee and Aviral Shrivastava},
year = {2010},
doi = {10.1109/TCAD.2010.2049050},
url = {http://dx.doi.org/10.1109/TCAD.2010.2049050},
tags = {compiler, systematic-approach},
researchr = {https://researchr.org/publication/LeeS10-26},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {29},
number = {7},
pages = {1018-1027},
}