An on-chip self-test architecture with test patterns recorded in scan chains - researchr publication authors

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Kuen-Jong Lee, Pin-Hao Tang, Michael A. Kochte. An on-chip self-test architecture with test patterns recorded in scan chains. In 2016 IEEE International Test Conference, ITC 2016, Fort Worth, TX, USA, November 15-17, 2016. pages 1-10, IEEE, 2016. [doi]

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