Yongsun Lee, Heein Yoon, Mina Kim, Jaehyouk Choi. A PVT-robust -59-dBc reference spur and 450-fsRMS jitter injection-locked clock multiplier using a voltage-domain period-calibrating loop. In 2016 IEEE Symposium on VLSI Circuits, VLSIC 2016, Honolulu, HI, USA, June 15-17, 2016. pages 1-2, IEEE, 2016. [doi]
@inproceedings{LeeYKC16,
title = {A PVT-robust -59-dBc reference spur and 450-fsRMS jitter injection-locked clock multiplier using a voltage-domain period-calibrating loop},
author = {Yongsun Lee and Heein Yoon and Mina Kim and Jaehyouk Choi},
year = {2016},
doi = {10.1109/VLSIC.2016.7573550},
url = {http://dx.doi.org/10.1109/VLSIC.2016.7573550},
researchr = {https://researchr.org/publication/LeeYKC16},
cites = {0},
citedby = {0},
pages = {1-2},
booktitle = {2016 IEEE Symposium on VLSI Circuits, VLSIC 2016, Honolulu, HI, USA, June 15-17, 2016},
publisher = {IEEE},
isbn = {978-1-5090-0635-9},
}