An improved I/O buffer correlation methodology between silicon and the SPICE model

Lai Chen Leong, See Hour Ying, Chee Seong Fong, Wei Wei Lo. An improved I/O buffer correlation methodology between silicon and the SPICE model. In 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2010, Kuala Lumpur, Malaysia, December 6-9, 2010. pages 999-1002, IEEE, 2010. [doi]

@inproceedings{LeongYFL10,
  title = {An improved I/O buffer correlation methodology between silicon and the SPICE model},
  author = {Lai Chen Leong and See Hour Ying and Chee Seong Fong and Wei Wei Lo},
  year = {2010},
  doi = {10.1109/APCCAS.2010.5775098},
  url = {http://dx.doi.org/10.1109/APCCAS.2010.5775098},
  researchr = {https://researchr.org/publication/LeongYFL10},
  cites = {0},
  citedby = {0},
  pages = {999-1002},
  booktitle = {2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2010, Kuala Lumpur, Malaysia, December 6-9, 2010},
  publisher = {IEEE},
  isbn = {978-1-4244-7454-7},
}