Turbo Product Code Decoder Without Interleaving Resource: From Parallelism Exploration to High Efficiency Architecture

Camille Leroux, Christophe Jégo, Patrick Adde, Deepak Gupta, Michel Jézéquel. Turbo Product Code Decoder Without Interleaving Resource: From Parallelism Exploration to High Efficiency Architecture. VLSI Signal Processing, 64(1):17-29, 2011. [doi]

@article{LerouxJAGJ11,
  title = {Turbo Product Code Decoder Without Interleaving Resource: From Parallelism Exploration to High Efficiency Architecture},
  author = {Camille Leroux and Christophe Jégo and Patrick Adde and Deepak Gupta and Michel Jézéquel},
  year = {2011},
  doi = {10.1007/s11265-010-0478-5},
  url = {http://dx.doi.org/10.1007/s11265-010-0478-5},
  tags = {architecture},
  researchr = {https://researchr.org/publication/LerouxJAGJ11},
  cites = {0},
  citedby = {0},
  journal = {VLSI Signal Processing},
  volume = {64},
  number = {1},
  pages = {17-29},
}