A. Levisse, p. Royer, Bastien Giraud, Jean-Philippe Noël, Mathieu Moreau, Jean Michel Portal. Architecture, design and technology guidelines for crosspoint memories. In IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2017, Newport, RI, USA, July 25-26, 2017. pages 55-60, IEEE, 2017. [doi]
@inproceedings{LevisseRGNMP17,
title = {Architecture, design and technology guidelines for crosspoint memories},
author = {A. Levisse and p. Royer and Bastien Giraud and Jean-Philippe Noël and Mathieu Moreau and Jean Michel Portal},
year = {2017},
doi = {10.1109/NANOARCH.2017.8053733},
url = {http://doi.ieeecomputersociety.org/10.1109/NANOARCH.2017.8053733},
researchr = {https://researchr.org/publication/LevisseRGNMP17},
cites = {0},
citedby = {0},
pages = {55-60},
booktitle = {IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2017, Newport, RI, USA, July 25-26, 2017},
publisher = {IEEE},
isbn = {978-1-5090-6037-5},
}