P. Leyva, Ginés Doménech-Asensi, J. Garrigos, J. Illade-Quinteiro, Victor M. Brea, P. López, Diego Cabello. Simplification and hardware implementation of the feature descriptor vector calculation in the SIFT algorithm. In 24th International Conference on Field Programmable Logic and Applications, FPL 2014, Munich, Germany, 2-4 September, 2014. pages 1-4, IEEE, 2014. [doi]
@inproceedings{LeyvaDGIBLC14,
title = {Simplification and hardware implementation of the feature descriptor vector calculation in the SIFT algorithm},
author = {P. Leyva and Ginés Doménech-Asensi and J. Garrigos and J. Illade-Quinteiro and Victor M. Brea and P. López and Diego Cabello},
year = {2014},
doi = {10.1109/FPL.2014.6927409},
url = {http://dx.doi.org/10.1109/FPL.2014.6927409},
researchr = {https://researchr.org/publication/LeyvaDGIBLC14},
cites = {0},
citedby = {0},
pages = {1-4},
booktitle = {24th International Conference on Field Programmable Logic and Applications, FPL 2014, Munich, Germany, 2-4 September, 2014},
publisher = {IEEE},
}