Hierarchical and Multiple-Clock Domain High-Level Synthesis for Low-Power Design on FPGA - researchr publication authors

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Ghizlane Lhairech-Lebreton, Philippe Coussy, Eric Martin. Hierarchical and Multiple-Clock Domain High-Level Synthesis for Low-Power Design on FPGA. In International Conference on Field Programmable Logic and Applications, FPL 2010, August 31 2010 - September 2, 2010, Milano, Italy. pages 464-468, IEEE, 2010. [doi]

This author has not been identified. Look up 'Ghizlane Lhairech-Lebreton' in GoogleThis author has not been identified. Look up 'Philippe Coussy' in GoogleThis author has not been identified. Look up 'Eric Martin' in Google

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